Toshiba Corporation unveiled a scale-out technology that minimizes hardware limitations. The Simulation Bifurcation Machine (SBM) supports continued increases in computing speed and scale. The company calls it a game-changer for real-world problems that require large-scale, high-speed, and low latency, including simultaneous financial transactions involving large numbers of stock, and complex control of multiple robots. The research was published in Nature Electronics recently.
Speed and scale are key to finance, logistics, and communications, all of which have to deal with large numbers and make complex decisions fast. The company recently announced second-generation simulated bifurcation algorithms, implemented on classical computers via a single FPGA that surpasses quantum computers in obtaining optimal solutions for various combinatorial optimization problems at high speed.
The technology is a partitioned version of the simulated bifurcation algorithm enabling multiple FPGAs to exchange information on variables and that triggers an autonomous synchronization mechanism in minimizing the communications overhead without affecting overall performance.
Trials indicate that an SBM with a cluster of eight FPGA achieves computational throughput 5.4 times higher than an SBM with single FPGA, solving problems 16 times larger; and simulation results with a 64 FPGA SBM show the relationship between the computing speed and number of FPGA is exactly linear so that the technology can continue to increase the scale-out with the same effect. The 8 FPGA SBM also obtains solutions 828 times faster than an implementation of simulated annealing (SA).
